Method and apparatus for address expansion in a parallel image processing memory
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Oct 23, 2001
Grant Date -
N/A
app pub date -
Dec 30, 1997
filing date -
Dec 30, 1997
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method and apparatus for image processing provides a memory having a plurality of individual parallel buffers constructed from random access memories (RAMs) for storing data related to a group of image pixels. The buffers each store a parallel, identical version of the image data so that an image processor can access data related to a given pixel in the overall data from each buffer simultaneously. An address expander for the buffer rows and buffer columns is used to convert a row and column address of a selected 'central' pixel into a plurality of related pixel data addresses offset at predetermined distances from the selected pixel data's address. In this manner, the address expanders enable a group of related pixels, each in a different parallel buffer, to be accessed simultaneously, without requiring the processor to be interconnected with all of the buffers. This substantially reduces the complexity of processor interconnection design, while substantially enhancing processor speed.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully