Importance

Loading Importance Indicators...

Abstract

A device for performing redundant reading in a flash memory is provided. The device includes arrays of regular memory cells and arrays of redundant memory cells. Some of the regular memory cells may be defective and those will have defective addresses. A regular sense amplifier will read the regular memory cells at their accessed address while at a time no later a redundant sense amplifier will read the redundant memory cells. A first array of CAM's will store the defective addresses of the defective memory cells while a second array of CAM's will store the input/output designators of the defective memory cells. Address matching circuitry will compare the accessed addresses with the defective addresses to determine whether the accessed address is defective. Before the end of the reading intervals of the sense amplifiers, decoding circuitry will decode the input/output designators of both the defective and non-defective memory cells. A multi-bit multiplexer stage will output either the contents of the regular memory cell or, if the address is defective, the contents of the redundant memory cell. The contents will be applied to the multiplexer output corresponding to the input/output designator of the memory cell.

Loading the Abstract Image...

First Claim