Process for fabricating semiconductor device including antireflective etch stop layer

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6313018
SERIAL NO

09504449

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A microelectronic device such as a Metal-Oxide-Semiconductor (MOS) transistor is formed on a semiconductor substrate. A tungsten damascene interconnect for the device is formed using an etch stop layer of silicon nitride, silicon oxynitride or silicon oxime having a high silicon content of approximately 40% to 50% by weight. The etch stop layer has high etch selectivity relative to overlying insulator materials such as silicon dioxide, tetraethylorthosilicate (TEOS) glass and borophosphosilicate glass (BPSG). The etch stop layer also has a high index of refraction and is anti-reflective, thereby improving critical dimension control during photolithographic imaging.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
ADVANCED MICRO DEVICES INC2485 AUGUSTINE DRIVE SANTA CLARA CA 95054

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Cagan, Myron R Saratoga, CA 5 245
Foote, David K San Jose, CA 41 810
Gupta, Subhash San Jose, CA 107 3127
Wang, Fei San Jose, CA 1116 10607

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation