
US Patent No: 6,316,838
Number of patents in Portfolio can not be more than 2000
Semiconductor device
Stats
-
Nov 13, 2001
Issued date -
Mar 20, 2000
filing date -
09/531,231
serial no -
Expired
status

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Abstract
A semiconductor device includes a substrate provided with a plurality of leads, a face-down semiconductor element provided on one surface of the substrate, a first stacked semiconductor element and a second stacked semiconductor element provided on another surface of the substrate and connected to the substrate by wires, and an extended wiring mechanism for connecting electrodes of the face-down semiconductor element and electrodes of the first and second semiconductor elements. The connected electrodes are equi-electrodes whose electrical characteristics are equal.
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First Claim
Related Publications
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- 15 United States
- 10 France
- 8 Japan
- 7 China
- 5 Korea
- 2 Other
Patent Owner(s)
| Patent Owner | Address | Total Patents |
|---|---|---|
| FUJITSU LIMITED | KAWASAKI | 21511 |
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Akashi, Yuji | Kasugai, JP | 8 | 455 |
| Harayama, Masahiko | Kawasaki, JP | 13 | 282 |
| Hiraoka, Tetsuya | Kawasaki, JP | 16 | 444 |
| Okada, Akira | Kawasaki, JP | 126 | 1022 |
| Okuda, Hayato | Hiroshima, JP | 8 | 412 |
| Ozawa, Kaname | Kawasaki, JP | 9 | 438 |
| Sato, Mitsutaka | Kawasaki, JP | 60 | 1352 |
Cited Art
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 6,104,084 Semiconductor device including a wire pattern for relaying connection between a semiconductor chip and leads | 40 | 1998 | |
| 6,118,184 Semiconductor device sealed with a sealing resin and including structure to balance sealing resin flow | 121 | 1998 | |
| 6,100,594 Semiconductor device and method of manufacturing the same | 169 | 1998 | |
| 6,181,002 Semiconductor device having a plurality of semiconductor chips | 170 | 1999 | |
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| 6,118,176 Stacked chip assembly utilizing a lead frame | 81 | 1999 | |
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| 5,495,398 Stacked multi-chip modules and method of manufacturing | 216 | 1995 | |
Patent Citation Ranking
Forward Cites
| Patent Info | (Count) | # Cites | Year |
|---|---|---|---|
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| 7,102,208 Leadframe and semiconductor package with improved solder joint strength | 2 | 2000 | |
| 6,642,610 Wire bonding method and semiconductor package manufactured using the same | 19 | 2000 | |
| 6,927,478 Reduced size semiconductor package with stacked dies | 62 | 2002 | |
| 6,982,485 Stacking structure for semiconductor chips and a semiconductor package using it | 7 | 2002 | |
| 6,818,973 Exposed lead QFP package fabricated through the use of a partial saw process | 73 | 2002 | |
| 6,919,620 Compact flash memory card with clamshell leadframe | 1 | 2002 | |
| 6,798,047 Pre-molded leadframe | 5 | 2002 | |
| 6,777,789 Mounting for a package containing a chip | 6 | 2003 | |
| 6,965,159 Reinforced lead-frame assembly for interconnecting circuits within a circuit module | 4 | 2003 | |
| 6,750,545 Semiconductor package capable of die stacking | 13 | 2003 | |
| 6,794,740 Leadframe package for semiconductor devices | 4 | 2003 | |
| 6,803,254 Wire bonding method for a semiconductor package | 6 | 2003 | |
| 7,095,103 Leadframe based memory card | 0 | 2003 | |
| 6,879,034 Semiconductor package including low temperature co-fired ceramic substrate | 4 | 2003 | |
| 7,045,396 Stackable semiconductor package and method for manufacturing same | 75 | 2003 | |
| 7,008,825 Leadframe strip having enhanced testability | 22 | 2003 | |
| 6,876,068 Semiconductor package with increased number of input and output pins | 44 | 2003 | |
| 7,183,630 Lead frame with plated end leads | 7 | 2003 | |
| 6,897,550 Fully-molded leadframe stand-off feature | 3 | 2003 | |
| 7,485,952 Drop resistant bumpers for fully molded memory cards | 0 | 2003 | |
| 6,873,032 Thermally enhanced chip scale lead on chip semiconductor package and method of making same | 11 | 2003 | |
| 6,873,041 Power semiconductor package with strap | 16 | 2003 | |
| 7,071,541 Plastic integrated circuit package and method and leadframe for making the package | 1 | 2003 | |
| 7,245,007 Exposed lead interposer leadframe package | 43 | 2003 | |
| 7,057,280 Leadframe having lead locks to secure leads to encapsulant | 4 | 2003 | |
| 6,921,967 Reinforced die pad support structure | 4 | 2003 | |
| 6,998,702 Front edge chamfer feature for fully-molded memory cards | 7 | 2003 | |
| 6,846,704 Semiconductor package and method for manufacturing the same | 10 | 2003 | |
| 6,967,395 Mounting for a package containing a chip | 12 | 2003 | |
| 6,893,900 Method of making an integrated circuit package | 1 | 2003 | |
| 7,138,707 Semiconductor package including leads and conductive posts for providing increased functionality | 5 | 2003 | |
| 7,144,517 Manufacturing method for leadframe and for semiconductor package using the leadframe | 3 | 2003 | |
| 7,211,879 Semiconductor package with chamfered corners and method of manufacturing the same | 4 | 2003 | |
| 6,965,157 Semiconductor package with exposed die pad and body-locking leadframe | 9 | 2003 | |
| 7,115,445 Semiconductor package having reduced thickness | 1 | 2004 | |
| 7,057,268 Cavity case with clip/plug for use on multi-media card | 3 | 2004 | |
| 7,091,594 Leadframe type semiconductor package having reduced inductance and its manufacturing method | 7 | 2004 | |
| 7,170,150 Lead frame for semiconductor package | 2 | 2004 | |
| 6,844,615 Leadframe package for semiconductor devices | 7 | 2004 | |
| 7,005,326 Method of making an integrated circuit package | 5 | 2004 | |
| 7,190,062 Embedded leadframe semiconductor package | 24 | 2004 | |
| 7,211,471 Exposed lead QFP package fabricated through the use of a partial saw process | 42 | 2004 | |
| 7,598,598 Offset etched corner leads for semiconductor package | 0 | 2004 | |
| 7,202,554 Semiconductor package and its manufacturing method | 14 | 2004 | |
| 7,045,882 Semiconductor package including flip chip | 7 | 2004 | |
| 6,953,988 Semiconductor package | 18 | 2004 | |
| 7,217,991 Fan-in leadframe semiconductor package | 7 | 2004 | |
| 7,253,503 Integrated circuit device packages and substrates for making the packages | 41 | 2004 | |
| 7,001,799 Method of making a leadframe for semiconductor devices | 2 | 2004 | |
| 7,064,009 Thermally enhanced chip scale lead on chip semiconductor package and method of making same | 7 | 2004 | |
| 7,030,474 Plastic integrated circuit package and method and leadframe for making the package | 2 | 2004 | |
| 7,214,326 Increased capacity leadframe and semiconductor package using the same | 4 | 2005 | |
| 7,247,523 Two-sided wafer escape package | 15 | 2005 | |
| 6,995,459 Semiconductor package with increased number of input and output pins | 49 | 2005 | |
| 7,192,807 Wafer level package and fabrication method | 17 | 2005 | |
| 7,045,883 Thermally enhanced chip scale lead on chip semiconductor package and method of making same | 5 | 2005 | |
| 7,485,490 Method of forming a stacked semiconductor package | 6 | 2005 | |
| 7,507,603 Etch singulated semiconductor package | 8 | 2005 | |
| 7,361,533 Stacked embedded leadframe | 20 | 2005 | |
| 7,572,681 Embedded electronic component package | 19 | 2005 | |
| 7,112,474 Method of making an integrated circuit package | 1 | 2005 | |
| 7,675,180 Stacked electronic component package having film-on-wire spacer | 7 | 2006 | |
| 7,564,122 Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant | 1 | 2006 | |
| 8,410,585 Leadframe and semiconductor package made using the leadframe | 0 | 2006 | |
| 7,535,085 Semiconductor package having improved adhesiveness and ground bonding | 2 | 2006 | |
| 7,902,660 Substrate for semiconductor device and manufacturing method thereof | 15 | 2006 | |
| 7,633,144 Semiconductor package | 5 | 2006 | |
| 7,968,998 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package | 2 | 2006 | |
| 7,321,162 Semiconductor package having reduced thickness | 0 | 2006 | |
| 7,332,375 Method of making an integrated circuit package | 0 | 2006 | |
| 7,521,294 Lead frame for semiconductor package | 5 | 2006 | |
| 7,714,431 Electronic component package comprising fan-out and fan-in traces | 20 | 2006 | |
| 7,687,893 Semiconductor package having leadframe with exposed anchor pads | 3 | 2006 | |
| 7,829,990 Stackable semiconductor package including laminate interposer | 1 | 2007 | |
| 7,982,297 Stackable semiconductor package having partially exposed semiconductor die and method of fabricating the same | 1 | 2007 | |
| 7,420,272 Two-sided wafer escape package | 16 | 2007 | |
| 7,723,210 Direct-write wafer level chip scale package | 6 | 2007 | |
| 7,977,774 Fusion quad flat semiconductor package | 3 | 2007 | |
| 7,687,899 Dual laminate package structure with embedded elements | 5 | 2007 | |
| 7,777,351 Thin stacked interposer package | 23 | 2007 | |
| 8,089,159 Semiconductor package with increased I/O density and method of making the same | 0 | 2007 | |
| 7,847,386 Reduced size stacked semiconductor package and method of making the same | 0 | 2007 | |
| 7,560,804 Integrated circuit package and method of making the same | 1 | 2008 | |
| 7,956,453 Semiconductor package with patterning layer and method of making same | 0 | 2008 | |
| 7,723,852 Stacked semiconductor package and method of making same | 4 | 2008 | |
| 8,067,821 Flat semiconductor package with half package molding | 2 | 2008 | |
| 7,768,135 Semiconductor package with fast power-up cycle and method of making same | 3 | 2008 | |
| 7,808,084 Semiconductor package with half-etched locking features | 1 | 2008 | |
| 8,125,064 Increased I/O semiconductor package and method of making same | 0 | 2008 | |
| 8,184,453 Increased capacity semiconductor package | 1 | 2008 | |
| 7,692,286 Two-sided fan-out wafer escape package | 20 | 2008 | |
| 7,847,392 Semiconductor device including leadframe with increased I/O | 5 | 2008 | |
| 7,989,933 Increased I/O leadframe and semiconductor device including same | 1 | 2008 | |
| 8,008,758 Semiconductor device with increased I/O leadframe | 3 | 2008 | |
| 8,089,145 Semiconductor device including increased capacity leadframe | 1 | 2008 | |
| 8,072,050 Semiconductor device with increased I/O leadframe including passive device | 0 | 2008 | |
| 7,875,963 Semiconductor device including leadframe having power bars and increased I/O | 3 | 2008 | |
| 7,982,298 Package in package semiconductor device | 1 | 2008 | |
| 7,863,723 Adhesive on wire stacked semiconductor package | 2 | 2008 | |
| 8,058,715 Package in package device for RF transceiver module | 1 | 2009 | |
| 7,732,899 Etch singulated semiconductor package | 0 | 2009 | |
| 8,026,589 Reduced profile stackable semiconductor package | 4 | 2009 | |
| 7,960,818 Conformal shield on punch QFN semiconductor package | 0 | 2009 | |
| 7,928,542 Lead frame for semiconductor package | 1 | 2009 | |
| 7,977,163 Embedded electronic component package fabrication method | 2 | 2009 | |
| 8,129,849 Method of making semiconductor package with adhering portion | 0 | 2009 | |
| 8,072,083 Stacked electronic component package having film-on-wire spacer | 1 | 2010 | |
| 8,089,141 Semiconductor package having leadframe with exposed anchor pads | 0 | 2010 | |
| 7,872,343 Dual laminate package structure with embedded elements | 1 | 2010 | |
| 8,188,584 Direct-write wafer level chip scale package | 0 | 2010 | |
| 7,932,595 Electronic component package comprising fan-out traces | 4 | 2010 | |
| 8,324,511 Through via nub reveal method and structure | 0 | 2010 | |
| 7,906,855 Stacked semiconductor package and method of making same | 1 | 2010 | |
| 8,294,276 Semiconductor device and fabricating method thereof | 0 | 2010 | |
| 8,084,868 Semiconductor package with fast power-up cycle and method of making same | 0 | 2010 | |
| 8,319,338 Thin stacked interposer package | 0 | 2010 | |
| 8,299,602 Semiconductor device including leadframe with increased I/O | 0 | 2010 | |
| 8,143,727 Adhesive on wire stacked semiconductor package | 0 | 2010 | |
| 8,283,767 Dual laminate package structure with embedded elements | 0 | 2010 | |
| 8,188,579 Semiconductor device including leadframe having power bars and increased I/O | 1 | 2010 | |
| 8,390,130 Through via recessed reveal structure and method | 0 | 2011 | |
| 8,318,287 Integrated circuit package and method of making the same | 0 | 2011 | |
| 8,102,037 Leadframe for semiconductor package | 0 | 2011 | |
| 8,119,455 Wafer level package fabrication method | 1 | 2011 | |
| 8,304,866 Fusion quad flat semiconductor package | 0 | 2011 | |
| 8,432,023 Increased I/O leadframe and semiconductor device including same | 0 | 2011 | |
| 8,298,866 Wafer level package and fabrication method | 0 | 2012 | |
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|
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| 6,870,255 Integrated circuit wiring architectures to support independent designs | 10 | 2000 | |
| 6,858,939 Integrated circuit diagonal wiring architectures with zag conductors | 1 | 2001 | |
| 6,915,500 Method and arrangement for layout and manufacture of nonmanhattan semiconductor integrated circuit using simulated Euclidean wiring | 11 | 2001 | |
| 6,895,567 Method and arrangement for layout of gridless nonManhattan semiconductor integrated circuit designs | 19 | 2001 | |
| 6,957,410 Method and apparatus for adaptively selecting the wiring model for a design region | 5 | 2001 | |
| 7,073,150 Hierarchical routing method and apparatus that use diagonal routes | 4 | 2001 | |
| 7,003,754 Routing method and apparatus that use of diagonal routes | 6 | 2001 | |
| 7,398,498 Method and apparatus for storing routes for groups of related net configurations | 7 | 2002 | |
| 7,143,382 Method and apparatus for storing routes | 4 | 2002 | |
| 7,096,448 Method and apparatus for diagonal routing by using several sets of lines | 3 | 2002 | |
| 6,931,616 Routing method and apparatus | 7 | 2002 | |
| 6,915,501 LP method and apparatus for identifying routes | 5 | 2002 | |
| 6,883,154 LP method and apparatus for identifying route propagations | 8 | 2002 | |
| 6,738,960 Method and apparatus for producing sub-optimal routes for a net by generating fake configurations | 20 | 2002 | |
| 7,139,994 Method and apparatus for pre-computing routes | 4 | 2002 | |
| 6,900,540 Simulating diagonal wiring directions using Manhattan directional wires | 4 | 2002 | |
| 6,858,935 Simulating euclidean wiring directions using manhattan and diagonal directional wires | 9 | 2002 | |
| 7,155,697 Routing method and apparatus | 11 | 2002 | |
| 6,907,593 Method and apparatus for pre-computing attributes of routes | 6 | 2002 | |
| 6,877,149 Method and apparatus for pre-computing routes | 4 | 2002 | |
| 6,745,379 Method and apparatus for identifying propagation for routes with diagonal edges | 13 | 2002 | |
| 7,013,450 Method and apparatus for routing | 8 | 2002 | |
| 7,036,105 Integrated circuits with at least one layer that has more than one preferred interconnect direction, and method for manufacturing such IC's | 10 | 2002 | |
| 6,973,634 IC layouts with at least one layer that has more than one preferred interconnect direction, and method and apparatus for generating such a layout | 8 | 2002 | |
| 6,957,411 Gridless IC layout and method and apparatus for generating such a layout | 3 | 2002 | |
| 7,480,885 Method and apparatus for routing with independent goals on different layers | 13 | 2002 | |
| 7,171,635 Method and apparatus for routing | 19 | 2002 | |
| 7,143,383 Method for layout of gridless non manhattan integrated circuits with tile based router | 1 | 2002 | |
| 7,080,342 Method and apparatus for computing capacity of a region for non-Manhattan routing | 17 | 2002 | |
| 7,047,513 Method and apparatus for searching for a three-dimensional global path | 10 | 2002 | |
| 7,010,771 Method and apparatus for searching for a global path | 15 | 2002 | |
| 7,003,752 Method and apparatus for routing | 13 | 2002 | |
| 6,996,789 Method and apparatus for performing an exponential path search | 15 | 2002 | |
| 6,988,257 Method and apparatus for routing | 7 | 2002 | |
| 8,201,128 Method and apparatus for approximating diagonal lines in placement | 0 | 2006 | |
| 8,250,514 Localized routing direction | 0 | 2006 | |
| 8,112,733 Method and apparatus for routing with independent goals on different layers | 2 | 2008 | |
| 8,341,586 Method and system for routing | 0 | 2009 | |
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|
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| 6,707,140 Arrayable, scaleable, and stackable molded package configuration | 31 | 2000 | |
| 6,624,507 Miniature semiconductor package for opto-electronic devices | 29 | 2001 | |
| 6,642,613 Techniques for joining an opto-electronic module to a semiconductor package | 5 | 2001 | |
| 7,023,705 Ceramic optical sub-assembly for optoelectronic modules | 0 | 2002 | |
| 6,973,225 Techniques for attaching rotated photonic devices to an optical sub-assembly in an optoelectronic package | 1 | 2002 | |
| 6,916,121 Optical sub-assembly for optoelectronic modules | 5 | 2002 | |
| 6,765,275 Two-layer electrical substrate for optical devices | 0 | 2002 | |
| 6,767,140 Ceramic optical sub-assembly for opto-electronic module utilizing LTCC (low-temperature co-fired ceramic) technology | 4 | 2003 | |
| 6,858,468 Techniques for joining an opto-electronic module to a semiconductor package | 0 | 2003 | |
| 7,156,562 Opto-electronic module form factor having adjustable optical plane height | 11 | 2003 | |
| 6,985,668 Multi-purpose optical light pipe | 0 | 2003 | |
| 6,838,317 Techniques for joining an opto-electronic module to a semiconductor package | 0 | 2003 | |
| 7,086,786 Ceramic optical sub-assembly for opto-electronic module utilizing LTCC (low-temperature co-fired ceramic) technology | 0 | 2004 | |
| 7,432,575 Two-layer electrical substrate for optical devices | 0 | 2004 | |
| 7,247,942 Techniques for joining an opto-electronic module to a semiconductor package | 0 | 2004 | |
| 7,199,440 Techniques for joining an opto-electronic module to a semiconductor package | 0 | 2004 | |
| 7,086,788 Optical sub-assembly for opto-electronic modules | 1 | 2005 | |
| 7,269,027 Ceramic optical sub-assembly for optoelectronic modules | 0 | 2006 | |
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| 7,253,511 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package | 28 | 2004 | |
| 7,768,125 Multi-chip package system | 4 | 2006 | |
| 7,750,482 Integrated circuit package system including zero fillet resin | 0 | 2006 | |
| 7,429,786 Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides | 38 | 2006 | |
| 7,429,787 Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides | 22 | 2006 | |
| 7,372,141 Semiconductor stacked package assembly having exposed substrate surfaces on upper and lower sides | 33 | 2006 | |
| 7,582,960 Multiple chip package module including die stacked over encapsulated package | 1 | 2006 | |
| 7,394,148 Module having stacked chip scale semiconductor packages | 14 | 2006 | |
| 8,203,214 Integrated circuit package in package system with adhesiveless package attach | 0 | 2007 | |
| 7,692,279 Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package | 2 | 2007 | |
| 7,687,313 Method of fabricating a semiconductor multi package module having an inverted package stacked over ball grid array (BGA) package | 5 | 2008 | |
| 7,687,315 Stacked integrated circuit package system and method of manufacture therefor | 2 | 2008 | |
| 7,855,100 Integrated circuit package system with an encapsulant cavity and method of fabrication thereof | 3 | 2008 | |
| 7,645,634 Method of fabricating module having stacked chip scale semiconductor packages | 1 | 2008 | |
| 7,652,376 Integrated circuit package system including stacked die | 4 | 2008 | |
| 7,829,382 Method for making semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package | 0 | 2010 | |
| 8,021,924 Encapsulant cavity integrated circuit package system and method of fabrication thereof | 2 | 2010 | |
| 8,309,397 Integrated circuit packaging system with a component in an encapsulant cavity and method of fabrication thereof | 0 | 2011 | |
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| 7,784,010 Automatic routing system with variable width interconnect | 3 | 2004 | |
| 7,131,096 Method of automatically routing nets according to current density rules | 16 | 2004 | |
| 7,257,797 Method of automatic shape-based routing of interconnects in spines for integrated circuit design | 13 | 2005 | |
| 7,363,607 Method of automatically routing nets according to parasitic constraint rules | 4 | 2005 | |
| 7,530,040 Automatically routing nets according to current density rules | 4 | 2006 | |
| 7,373,628 Method of automatically routing nets using a Steiner tree | 7 | 2006 | |
| 7,603,644 Integrated circuit routing and compaction | 2 | 2006 | |
| 7,823,113 Automatic integrated circuit routing using spines | 3 | 2006 | |
| 8,095,903 Automatically routing nets with variable spacing | 3 | 2006 | |
| 8,099,700 Automatic integrated circuit routing using spines | 4 | 2007 | |
| 7,802,208 Design automation using spine routing | 1 | 2007 | |
| 8,171,447 Automatically routing nets according to current density rules | 1 | 2009 | |
| 7,984,411 Integrated circuit routing and compaction | 0 | 2009 | |
| 8,332,805 Automatically routing nets according to parasitic constraint rules | 0 | 2011 | |
| 8,332,799 Integrated circuit routing with compaction | 0 | 2011 | |
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| 6,661,083 Plastic semiconductor package | 31 | 2002 | |
| 7,205,647 Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages | 16 | 2003 | |
| 7,064,426 Semiconductor multi-package module having wire bond interconnect between stacked packages | 54 | 2003 | |
| 7,053,476 Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages | 46 | 2003 | |
| 6,972,481 Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages | 63 | 2003 | |
| 7,682,873 Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages | 0 | 2006 | |
| 7,279,361 Method for making a semiconductor multi-package module having wire bond interconnect between stacked packages | 5 | 2006 | |
| 8,030,134 Stacked semiconductor package having adhesive/spacer structure and insulation | 1 | 2006 | |
| 7,351,610 Method of fabricating a semiconductor multi-package module having a second package substrate with an exposed metal layer wire bonded to a first package substrate | 3 | 2007 | |
| 7,364,946 Method of fabricating a semiconductor multi-package module having inverted land grid array (LGA) package stacked over ball grid array (BGA) package | 8 | 2007 | |
| 7,358,115 Method of fabricating a semiconductor assembly including chip scale package and second substrate with exposed substrate surfaces on upper and lower sides | 3 | 2007 | |
| 8,143,100 Method of fabricating a semiconductor multi-package module having wire bond interconnect between stacked packages | 0 | 2007 | |
| 7,749,807 Method of fabricating a semiconductor multipackage module including a processor and memory package assemblies | 0 | 2007 | |
| 7,935,572 Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages | 1 | 2010 | |
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|
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| 6,580,164 Semiconductor device and method of manufacturing same | 12 | 2000 | |
| 6,836,010 Semiconductor device include relay chip connecting semiconductor chip pads to external pads | 6 | 2003 | |
| 6,777,801 Semiconductor device and method of manufacturing same | 1 | 2003 | |
| 6,905,913 Semiconductor device and method of manufacturing same | 3 | 2004 | |
| 7,414,320 Semiconductor device and method of manufacturing same | 3 | 2005 | |
| 7,705,469 Lead frame, semiconductor device using same and manufacturing method thereof | 2 | 2008 | |
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| 7,576,995 Flex circuit apparatus and method for adding capacitance while conserving circuit board surface area | 4 | 2005 | |
| 7,508,058 Stacked integrated circuit module | 0 | 2006 | |
| 7,608,920 Memory card and method for devising | 2 | 2006 | |
| 7,508,069 Managed memory component | 0 | 2006 | |
| 7,304,382 Managed memory component | 1 | 2006 | |
| 7,468,553 Stackable micropackages and stacked modules | 2 | 2007 | |
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|
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| 6,798,031 Semiconductor device and method for making the same | 16 | 2002 | |
| 6,818,999 Semiconductor device having multiple semiconductor chips in a single package | 5 | 2003 | |
| 8,404,980 Relay board and semiconductor device having the relay board | 0 | 2010 | |
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| 6,583,483 Semiconductor device and its manufacturing method | 5 | 2001 | |
| 6,780,749 Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges | 29 | 2003 | |
| 7,573,137 Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices | 0 | 2006 | |
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| 7,755,175 Multi-stack chip package with wired bonded chips | 1 | 2006 | |
| 8,115,290 Storage medium and semiconductor package | 0 | 2009 | |
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| 6,777,796 Stacked semiconductor chips on a wiring board | 3 | 2002 | |
| 7,250,686 Semiconductor device, method for designing the same and recording medium that can be read by computer in which program for designing semiconductor device is recorded | 0 | 2006 | |
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| 8,089,142 Methods and apparatus for a stacked-die interposer | 0 | 2002 | |
| 7,615,871 Method and apparatus for attaching microelectronic substrates and support members | 0 | 2006 | |
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|||
| 6,633,078 Semiconductor device, method for manufacturing an electronic equipment, electronic equipment and portable information terminal | 20 | 2001 | |
| 6,905,911 Semiconductor device, method for manufacturing an electronic equipment, electronic equipment, and portable information terminal | 4 | 2003 | |
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|||
| 6,611,063 Resin-encapsulated semiconductor device | 39 | 2000 | |
| 6,433,421 Semiconductor device | 21 | 2001 | |
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| 7,083,077 Method and contact point for establishing an electrical connection | 2 | 2002 | |
| 7,906,858 Contact securing element for bonding a contact wire and for establishing an electrical connection | 0 | 2006 | |
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| 8,030,747 Stacked package and method of manufacturing the same | 0 | 2008 | |
| 8,349,651 Stacked package and method of manufacturing the same | 0 | 2011 | |
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| 6,795,958 Method and apparatus for generating routes for groups of related node configurations | 8 | 2002 | |
| 6,952,815 Probabilistic routing method and apparatus | 8 | 2002 | |
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| 6,744,126 Multichip semiconductor package device | 14 | 2002 | |
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| 7,374,967 Multi-stack chip size packaging method | 2 | 2003 | |
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| 8,314,499 Flexible and stackable semiconductor die packages having thin patterned conductive layers | 0 | 2008 | |
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| 6,882,045 Multi-chip module and method for forming and method for deplating defective capacitors | 32 | 2001 | |
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| 8,264,074 Device for use as dual-sided sensor package | 0 | 2010 | |
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| 7,834,463 Stack package having pattern die redistribution | 1 | 2006 | |
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| 8,404,520 Package-on-package assembly with wire bond vias | 0 | 2012 | |
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| 6,852,571 Method of manufacturing stacked semiconductor device | 0 | 2003 | |
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| RE41826 Semiconductor device | 0 | 2007 | |
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| 7,821,140 Semiconductor device and wire bonding method | 1 | 2010 | |
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| 7,288,841 Laminated semiconductor package | 9 | 2006 | |
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| 7,605,454 Memory card and method for devising | 0 | 2007 | |
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|
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| 7,605,479 Stacked chip assembly with encapsulant layer | 0 | 2002 | |
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| 6,790,710 Method of manufacturing an integrated circuit package | 16 | 2002 | |
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| 8,440,554 Through via connected backside embedded circuit features structure and method | 0 | 2010 | |
| 8,441,110 Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package | 0 | 2011 | |
Maintenance Fees
| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|---|---|---|---|
| 11.5 Year Payment | $7400.00 | $3700.00 | $1850.00 | May 13, 2013 |
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge - 11.5 year - Late payment within 6 months | $160.00 | $80.00 | $40.00 |
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |