Importance

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Abstract

A tuning signal is injected into an LC tank circuit oscillator, e.g., through an impedance (either reactive, inductive, capacitive and/or resistive) to tune the phase and/or frequency of the LC tank circuit oscillator. A negative resistance is included in parallel with the LC tank circuit oscillator to compensate for losses in the LC tank circuit, and a bias signal is provided to power the operation of the LC tank circuit. Multiple LC tank circuit oscillators may be used to provide stable multiplied or divided frequencies. In another embodiment, the nominal frequency of the LC tank circuit oscillator may be adjusted using a varactor or other voltage-controlled element in the LC tank circuit oscillator under the control of, e.g., the output of a separate PLL loop including another LC tank circuit oscillator. In one application, the injection tuned LC tank circuit forms a clock recovery cell using a clock signal embedded in a NRZ (Non Return to Zero) pseudo-random data stream. The slave oscillator in turn generates a recovered clock signal. In another application, a sub-harmonic clock signal in a 5.6 Gb/s NRZ (Non Return to Zero) 2.sup.7 -1 pseudo-random data stream is used to injection lock a CMOS LC tank circuit to 2.8 GHz. The data stream is de-serialized into two 2.8 Gb/s data streams by a parallel combination of a positive and negative edge flip-flops (FF) clocked with alternate edges of this recovered clock.

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First Claim