Method of manufacturing semiconductor devices

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6326316
SERIAL NO

09562330

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

Disclosed is a semiconductor device, comprising a semiconductor substrate, a cell transistor formed in the semiconductor substrate, an interlayer dielectric film in which is formed a contact hole communicating with a part of the cell transistor, a contact plug buried in the contact hole formed in the interlayer dielectric film, a capacitor lower electrode formed of a ruthenium/tantalum laminate film consisting of a tantalum film and a ruthenium film formed on the tantalum film, the lower electrode being formed on interlayer dielectric film and connected to the contact plug, a capacitor dielectric film formed on the ruthenium film included in the capacitor lower electrode and consisting of a metal oxide, and a capacitor upper electrode formed on the capacitor dielectric film, the ruthenium film exhibiting (00n) dominant orientation, where n denotes a positive integer.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Eguchi, Kazuhiro Chigasaki, JP 83 1047
Kiyotoshi, Masahiro Sagamihara, JP 99 3657

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation