Importance

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Abstract

An interpolating D/A converter architecture includes a reference voltage generator, a decoding switch network, a routing switch, and an interpolating buffer. The reference voltage generator generates a plurality of reference voltages. The decoding switch network is coupled to the reference voltage generator for selecting two reference voltages from the plurality of reference voltages in response to the plurality of high bits of digital video signals. The routing switch is coupled to the decoding switch network for selectively providing a first reference voltage and a second reference voltage in response to a plurality of low bits of the digital video signals. And the interpolating buffer is coupled to the routing switch for outputting an interpolated analog signal in response to the first reference voltage and the second reference voltage. Eventually, the present invention can save half the D/A reference lines and half the associated decoding switch rows, and thereby save the die cost.

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First Claim