Signal latching of high bandwidth DRAM arrays when skew between different components is higher than signal rate
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United States of America Patent
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Dec 4, 2001
Grant Date -
N/A
app pub date -
May 24, 2000
filing date -
Mar 16, 1998
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Abstract
A system enables the capture of incoming signals from different components when the skew between the different components is higher than the signal rate. The system comprises a first port for serially receiving a first signal at a signal rate from a first component; a second port for serially receiving a second signal at the signal rate from a second component; a first serial-to-parallel conversion circuit for performing serial-to-n-bit-parallel conversion of the first signal, n being greater than one; and a second serial-to-parallel conversion circuit for performing serial-to-n-bit parallel conversion of the second signal.
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