Overlapping peripheral chip select space with DRAM on a microcontroller with an integrated DRAM controller
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United States of America Patent
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-
Dec 4, 2001
Grant Date -
N/A
app pub date -
Mar 7, 1997
filing date -
Mar 7, 1997
priority date (Note) -
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Abstract
A peripheral device selected with a chip select is mapped onto address space occupied by DRAM without causing internal or external contentions. A first address range is provided for accessing DRAM. A second address range is provided for accessing another device. The second address range is within the first address range. A row address strobe is provided for accesses within both the first and second address ranges but the column address strobe to the DRAM is inhibited when a memory access occurs within the second address range.
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