Apparatus including a fetch unit to include branch history information to increase performance of multi-cylce pipelined branch prediction structures
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United States of America Patent
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Dec 11, 2001
Grant Date -
N/A
app pub date -
Feb 23, 1999
filing date -
Feb 23, 1999
priority date (Note) -
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Abstract
An instruction fetch unit for fetching instructions from an instruction cache of a processor. The fetch unit includes a next fetch address mechanism generating predicted next fetch addresses, the next fetch address mechanism generating a next fetch address for a fetch bundle over at least two cycles of the processor. The next fetch address mechanism determines the next fetch address based on whether a control transfer instruction from an intermediate set of fetched instructions is taken.
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