UART automatic parity support for frames with address bits
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United States of America Patent
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Dec 18, 2001
Grant Date -
N/A
app pub date -
Oct 31, 1998
filing date -
Oct 31, 1998
priority date (Note) -
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Abstract
An asynchronous serial port provides automatic parity generation and detection in frames supporting address bits. In data frames comprising a variable number of data bits, the parity bit is located immediately following the last data bit and before the address bit. Parity generation is performed automatically based only on the preceding data bits. Parity detection allows interrupts to be generated directly from the parity bit received. Further, parity generation and detection is not dependent on the number of bits in the data frame.
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