Semiconductor device having a mark section and a dummy pattern
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United States of America Patent
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-
Jan 1, 2002
Grant Date -
N/A
app pub date -
Dec 9, 1999
filing date -
May 31, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor device includes a plurality of real chip regions and dicing lines to separate the real chip regions on a semiconductor substrate. A dicing line includes a mark section and a mark forbidden region around the mark section. A dummy wiring pattern is formed to fill the dicing line or a portion of the real chip region to surround the mark section and the mark forbidden region. A dummy wiring pattern may be a single continuous wiring pattern or the single wiring pattern may be divided into segments. Alternatively, a dummy wiring pattern may be composed of a plurality of square portions arranged in a matrix fashion.
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