Methods of testing integrated circuitry, methods of forming tester substrates, and circuitry testing substrates

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United States of America Patent

PATENT NO 6337575
SERIAL NO

09221216

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Abstract

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A method of testing integrated circuitry includes providing a substrate comprising integrated circuitry to be tested. The circuitry substrate to be tested has a plurality of exposed conductors in electrical connection with the integrated circuitry. In one implementation, at least some of the exposed conductors of the circuitry substrate are heated to a temperature greater than 125.degree. C. and within at least 50% in degrees centigrade of and below the melting temperature of the exposed conductors of the circuitry substrate. In one implementation, such are heated to a temperature below their melting temperature yet effective to soften said at least some of the exposed conductors to a point enabling their deformation upon application of less than or equal to 30 grams of pressure per exposed conductor. The circuitry substrate is engaged with a tester substrate. The tester substrate has a plurality of exposed conductors at least some of which are positioned to align with exposed conductors of the circuitry substrate. The engaging occurs while the at least some conductors of the circuitry substrate are heated to temperature and comprises contacting at least some of the exposed conductors of the tester substrate with conductors of the circuitry substrate. The integrated circuitry is tested through said conductors of the circuitry substrate and the tester substrate. Methods of forming tester substrates are disclosed, as are circuitry testing substrates.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SOUTH FEDERAL WAY BOISE ID 83707

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akram, Salman Boise, ID 801 30978

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