Semiconductor memory device
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United States of America Patent
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Feb 5, 2002
Grant Date -
Aug 2, 2001
app pub date -
Jan 25, 2001
filing date -
Apr 7, 1997
priority date (Note) -
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status (Latency Note)
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Abstract
A semiconductor memory device comprises memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.
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