Method of manufacturing a semiconductor device

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United States of America Patent

PATENT NO 6346438
SERIAL NO

09105960

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Abstract

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A method of manufacturing a semiconductor device according to this invention is characterized by including the steps of a) forming, on one major surface of a substrate, a gate structure constituted by either one of a dummy gate electrode and a gate electrode having an insulating film at least on bottom surface, and a device isolation insulating film so as to form a first groove divided by the dummy gate electrode or the gate electrode, to position the dummy gate electrode or the gate electrode in the first groove, and to form the gate structure to have an upper surface level not higher than an upper level of the device isolation insulating film, and b) forming source and drain electrodes in the first groove.

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Patent Owner(s)

Patent OwnerAddress
KABUSHIKI KAISHA TOSHIBA1-1 SHIBAURA 1-CHOME MINATO-KU TOKYO 1050023 ?1050023

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akasaka, Yasushi Yokohama, JP 43 1471
Matsuo, Kouji Yokohama, JP 84 1553
Suguro, Kyoichi Yokohama, JP 159 4159
Tsunashima, Yoshitaka Yokohama, JP 89 1781
Yagishita, Atsushi Yokohama, JP 72 1734

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