Aliasing circuit and series interpolation cell of an analog-digital converter using such a circuit
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United States of America Patent
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Feb 12, 2002
Issued Date -
N/A
app pub date -
Aug 11, 2000
filing date -
Aug 13, 1999
priority date (Note) -
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Abstract
A signal aliasing circuit that can be used especially to make a series interpolation cell of an interpolation analog-digital converter comprises two pairs of differential arms powered by one and the same current source connected to a first power supply terminal, each pair comprising two transistors, the transistors of one pair being parallel-connected with the transistors of the other pair. Each group of two parallel-connected transistors is connected by a respective common resistor to a second power supply terminal, the two outputs of the aliasing circuit being the combined collectors of the two groups of parallel-connected transistors. The disclosed device can be applied especially to converters whose architecture comprises what is known as a series interpolation part requiring high precision.
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