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Abstract

Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of these applied data signals have been properly captured. A first group of the applied data signals is captured, and a group of expect data signals are generated from the captured first group of applied data signals. A second group of the applied data signals are then captured after the first group. The second group of applied data signals are determined to have been properly captured when the second captured group of applied data signals corresponds to the group of expect data signals. In this way, when capture of the applied series of data signals is shifted in time from an expected initial capture point, subsequent captured groups of applied data signals are compared to their correct expected data signals in order to determine whether that group, although shifted in time, was nonetheless correctly captured. A pattern generator generates expect data signals in this manner, and this pattern generator may be utilized in a synchronization circuit to synchronize a plurality of clock signals. This pattern generator is suitable for use in synchronization circuits and a variety of integrated circuits, but is particularly well-suited for synchronizing command and data clocks applied to SLDRAMs.

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First Claim