Semiconductor package configuration based on lead frame having recessed and shouldered portions for flash prevention
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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Mar 5, 2002
Grant Date -
N/A
app pub date -
May 19, 2000
filing date -
May 19, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A semiconductor package configuration is proposed for use to pack an semiconductor chip of an optically-sensitive type, such as an image-sensor chip or an ultraviolet-sensitive EP-ROM chip. This type of semiconductor chips are encapsulated in an encapsulation body having a centrally-hollowed portion whose opening is covered with a lid. This semiconductor package configuration is characterized in the use of a lead frame having a die-pad portion formed with a shouldered portion at the edge thereof and having a lead portion formed with a recessed portion at the point where the inner wall of the centrally-hollowed portion of the encapsulation body is located. The shoulder portion and the recessed portion are used to help prevent the flash of resin on lead frame during the molding process to form the encapsulation body in the manufacture of the semiconductor package configuration. As a result, it can help assure the quality of the bonding of the semiconductor chip on the die-bonding area of the die pad as well as the bonding of gold wires to the wire-bonding area on the leads of the lead frame.
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