Hardware and software co-verification employing deferred synchronization

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6356862
APP PUB NO 20010011210A1
SERIAL NO

09160368

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Abstract

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Hardware and software of a system is co-verified with synchronization events generated in the respective hardware and software verifications being accumulated and provided to the other verification on a periodic basis. The faster verification is halted to allow the slower verification to catch up, upon expiration of a synchronization window. Once caught up, the accumulated synchronization events are provided to the respective other verification. The transferred synchronization events are then in turn injected into the other verification at the same offset time into a synchronization period the synchronization events occurred in the previous synchronization period.

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Patent Owner(s)

Patent OwnerAddress
MENTOR GRAPHICS CORPORATION8005 SW BOECKMAN ROAD WILSONVILLE OR 97070-7777

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bailey, Brian 20444 S. Jason Dr., Oregon City, OR 97045 15 334

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