Method and apparatus for determining continuity and integrity of a RAMBUS channel in a computer system
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United States of America Patent
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Mar 12, 2002
Grant Date -
N/A
app pub date -
Jan 26, 1999
filing date -
Jan 26, 1999
priority date (Note) -
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Abstract
A computer system includes at least one processor, at least one memory, and a device for performing a prescribed continuity and integrity check of a memory bus channel having a serial topology. In one embodiment, basic input output system (BIOS) firmware is stored in memory and includes instructions for causing the processor to perform the prescribed continuity and integrity check of the memory bus channel having a serial topology.
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