Method of making a SOI device having fixed channel threshold voltage

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6358805
APP PUB NO 20010019862A1
SERIAL NO

09114934

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In a semiconductor device and method for manufacturing the same, a buried insulating layer is formed on a semiconductor substrate, multiple depletion regions of a first conductivity type are formed on the buried insulating layer and separated from one another, a field oxide layer is formed among the depletion regions of the buried insulating layer, a gate oxide layer is formed on the depletion regions, a gate is formed on the gate oxide layer, impurity regions that are heavily doped with impurities of a second conductivity type is formed in the depletion regions on both sides of the gate to define a source and drain, and a counter doping layer that is lightly doped with impurities of the second conductivity type is formed under the channel defined by a portion of the depletion regions positioned between the impurity regions. The counter doping layer is formed at a predetermined or fixed distance from the upper surface of the depletion region defining the channel, overlapping the lower portion of the depletion region to achieve uniform thickness in at least a portion of the depletion region.

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Patent Owner(s)

  • LG SEMICON CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Son, Jeong-Hwan Taejeon, KR 26 309
Yang, Hyeong-Mo Seoul, KR 5 17

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