Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures
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United States of America Patent
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Mar 19, 2002
Issued Date -
N/A
app pub date -
Nov 13, 2000
filing date -
May 19, 1994
priority date (Note) -
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Abstract
A semiconductor chip packaging assembly comprising a frame having a central aperture, a flexible substrate attached to the frame across the central aperture, and a unitary support structure having a plurality of apertures therethrough attached to the substrate within the central aperture of the frame with at least some of the substrate terminals underlying the unitary support structure. A chip is disposed within each aperture and attached to the substrate with the electrical contacts of the chip connected to the substrate terminals. A compliant layer is disposed between the substrate and the unitary support structure and between the substrate and the chip.
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