DRAM having a cup-shaped storage node electrode recessed within an insulating layer
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United States of America Patent
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Mar 26, 2002
Issued Date -
N/A
app pub date -
Sep 19, 2000
filing date -
Jan 20, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Provided is a semiconductor device and a method of manufacturing the semiconductor device having a stacked type capacitor excellent in storage capacity, breakdown voltage and reliability. A storage node electrode (Ru) of the stacked-type capacitor is formed on a contact hole of the underlying insulating film by the steps of forming the side wall of the contact hole diagonally at a taper angle within the range of 90 to 110.degree., forming a storage node electrode on the inner wall surface of the contact hole, filling SOG in the contact hole, etching off the Ru film on the insulating film using SOG as a mask, and etching off the Ru film formed on the upper peripheral region of the inner wall in the depth direction of the contact hole. Thereafter, the dielectric film of the stacked-type capacitor formed of a (Ba, Sr) TiO.sub.3 thin film is formed on the Ru storage node electrode. In this manner, it is possible to obtain a stack-type capacitor having a drastically-improved step coverage and a high breakdown voltage. In addition, it is easy to reduce the distance between adjacent Ru storage node electrodes within a resolution limit of lithography, compared to the conventional method.
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