Dual gate process using self-assembled molecular layer
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United States of America Patent
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Apr 2, 2002
Grant Date -
N/A
app pub date -
Jan 31, 2001
filing date -
Jan 31, 2001
priority date (Note) -
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Abstract
A method of forming dual gate structures on first and second portions, substrate includes: providing an insulative layer over the substrate; providing a first layer of material having a first work function with the first portion of the substrate; providing a second layer of material having a second work function different than the first work function over the second portion of the substrate; patterning a third layer of material over the first and second layers of material, whereby features of the third layer of material are provided over both the first and second portions of the substrate; providing a self-assembled molecular layer over at least a portion of the features, wherein the self-assembled molecular layer has regions of etch selectivity; and etching the self-assembled molecular layer at the regions of etch selectivity until gate structures are formed over the first and second portions of the substrate.
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