Passivation for tight metal geometry
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United States of America Patent
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Apr 2, 2002
Grant Date -
N/A
app pub date -
Dec 31, 1997
filing date -
Dec 31, 1997
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method of passivating an integrated circuit comprising providing an integrated circuit having a top side including a bond pad, depositing a first dielectric over said top side of said integrated circuit, exposing a first area portion of a top side of said bond pad, depositing a second dielectric of one of a material that is substantially impermeable to moisture over said top side of said integrated circuit, and exposing a second area portion of said top side of said bond pad, said second area portion within said first area portion is disclosed.
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