Display device including a cache memory having a plurality of memory segments
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United States of America Patent
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Apr 2, 2002
Grant Date -
N/A
app pub date -
Jan 28, 1999
filing date -
May 28, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A display device is disclosed that includes a cache memory consisting of memory segments, each memory segment being capable of storing an image fragment. A video generator is driven by a video cache reader, which builds up a screen image from complete or partial image fragments stored in the memory segments. By means of hardware counters and registers the address of an image point in the cache memory is derived from the address of the image point read in last. As a result of this, the screen image can be built up very rapidly, so that no special screen memory is required and the amount of data to be transferred is reduced.
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