Method for programming multi-level non-volatile memories by controlling the gate voltage
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United States of America Patent
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Apr 2, 2002
Grant Date -
N/A
app pub date -
Aug 2, 2000
filing date -
Aug 3, 1999
priority date (Note) -
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Abstract
When programming, for each programming pulse, a threshold voltage whose value is increased with respect to the previous programming pulse is applied to the gate terminal of each cell to be programmed. After an initial step, the increase of threshold voltage of the cell being programmed becomes equal to the applied gate voltage increase. In order to reduce the global programming time, keeping a small variability interval of threshold voltages associated with each level, to pass from a threshold level to a following one, each cell to be programmed is supplied with a plurality of consecutive pulses without verify, until it is immediately below the voltage level to be programmed, and then a verify step is performed, followed by subsequent programming and verify steps until the cell to be programmed reaches the desired threshold value.
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