Method to deposit a cooper seed layer for dual damascence interconnects

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United States of America Patent

PATENT NO 6368958
SERIAL NO

09876598

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Abstract

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A new method of depositing a copper layer, using disproportionation of Cu(I) ions from a solution stabilized by a polar organic solvent, for single and dual damascene interconnects in the manufacture of an integrated circuit device has been achieved. A dielectric layer, which may comprise a stack of dielectric material, is provided overlying a semiconductor substrate. The dielectric layer is patterned to form vias and trenches for planned dual damascene interconnects. A barrier layer is deposited overlying the dielectric layer to line the vias and trenches. A simple Cu(I) ion solution, stabilized by a polar organic solvent, is coated overlying said barrier layer. Water is added to the stabilized simple Cu(I) ion solution to cause disproportionation of the simple Cu(I) ion from the Cu(I) ion solution. A copper layer is deposited overlying the barrier layer. The copper layer may comprise a thin seed layer for use in subsequent electroplating or electroless plating of copper or may comprise a thick copper layer to fill the vias and trenches. The integrated circuit is completed.

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Patent Owner(s)

Patent OwnerAddress
CHARTERED SEMICONDUCTOR MANUFACTURING LTDSINGAPORE SINGAPORE CITY SINGAPORE CITY SINGAPORE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chooi, Simon Singapore, SG 97 2270
Gupta, Subhash Singapore, SG 107 3127
Ho, Paul Kwok Keung Singapore, SG 27 405
Zhou, Mei Sheng Singapore, SG 133 2512

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