Method of forming self-aligned via structure

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 6372641
SERIAL NO

08742704

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A self-aligned via between interconnect layers in an integrated circuit, and a process for forming such a via which allows a less precise masking alignment to be used to fabricate an integrated circuit with increased packing density.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
INTEGRATED DEVICE TECHNOLOGY INC6024 SILVER CREEK VALLEY ROAD SAN JOSE CA 95138

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lien, Chuen-Der Mountain View, CA 153 2742

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation