Method and apparatus for computing a sum of packed data elements using SIMD multiply circuitry

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United States of America Patent

PATENT NO 6377970
SERIAL NO

09052904

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Abstract

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A method and apparatus that adds each one of multiple elements of a packed data together to produce a result. According to one such a method and apparatus, each of a first set of portions of partial products is produced using a first set of partial product selectors in a multiplier, each of the first set of portions of the partial products being zero. Each of the multiple elements is inserted into one of a second set of portions of the partial products using a second set of partial product selectors, each of the second set of portions of the partial products being aligned. Each of the multiple elements are added together to produce the result including a field having the sum of the multiple elements.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Abdallah, Mohammad A Folsom, CA 46 1500
Pentkovski, Vladimir Folsom, CA 35 1344

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