System having double data transfer rate and intergrated circuit therefor
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Apr 23, 2002
Grant Date -
Feb 7, 2002
app pub date -
Apr 10, 2000
filing date -
Apr 18, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A system and an integrated circuit device therefor. The integrated circuit device comprises output driver circuitry to output data onto a first external signal line. The output driver circuitry outputs a first portion of data in response to a rising edge transition of a first external clock signal. The output driver circuitry outputs a second portion of data in response to a falling edge transition of the first external clock signal. The integrated circuit device may further include input receiver circuitry to sample data from a second external signal line. The input receiver circuitry samples a first portion of data in response to a rising edge transition of a second external clock signal. The input receiver circuitry samples a second portion of data in response to a falling edge transition of the second external clock signal.
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