Automatic global routing device for efficiently determining optimum wiring route on integrated circuit and global routing method therefor
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United States of America Patent
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Apr 23, 2002
Grant Date -
Aug 16, 2001
app pub date -
Mar 27, 1998
filing date -
Mar 27, 1997
priority date (Note) -
Expired
status (Latency Note)
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Abstract
Automatic routing device which automatically conducts placement and routing of integrated circuits on an integrated circuit chip, including a wire capacitance calculating unit, a degree of wire congestion calculating unit and a routing checking unit for determining whether routing of a desired net is possible or not based on a degree of wire congestion at each global routing cell boundary formed by the division of a logic circuit chip to be processed into global routing cells, and a number of grids calculating units, a grid use rate calculating unit and a grid use rate checking unit for determining whether routing of a desired net is possible or not based on a state of the use of a routing track grid in each global routing cell formed on the logic circuit chip.
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