FPGA customizable to accept selected macros
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United States of America Patent
Stats
-
Apr 30, 2002
Issued Date -
N/A
app pub date -
Aug 7, 2001
filing date -
Jan 14, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A field programmable gate array (FPGA) is provided that can selectively accept or reject selected software (macros). Specifically, configuration data for the FPGA is passed through a configuration port to a decoder. The decoder processes the configuration data to detect locked macros. If a locked macro is detected, the decoder attempts to unlock the locked macro using one or more keys stored in a key table of the FGPA. If an appropriate key is in the key table, the decoder unlocks the locked macro to configure the FPGA. The keys can be pre-programmed into the FGPA by the macro vendor. If configuration data containing a locked macro is used with an FPGA without the appropriate key, configuration of the FPGA fails.
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