Logic block used as dynamically configurable logic function

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United States of America Patent

PATENT NO 6384627
SERIAL NO

09788062

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Abstract

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A method of configuring an FPGA lookup table to implement both exact and relative matching comparators is disclosed. Examples of exact matching of two variables, exact matching of a variable to a constant, relative matching (greater than) of a variable to a constant, and combined exact and relative matching are discussed. Use of the comparator to trigger a logic analyzer to collect data is discussed.

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Patent Owner(s)

Patent OwnerAddress
XILINX INC2100 LOGIC DRIVE SAN JOSE CA 95124

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fross, Bradley K Claremont, CA 9 122
McGettigan, Edward S San Jose, CA 10 382

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