Importance

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Abstract

When a FULL or EMPTY state of a First In First Out memory (FIFO) in an elastic store is detected by a verification and recovery circuit, a recovery operation is initiated, i.e., writing to or reading from the FIFO is disabled for a predetermined number of respective (write or read) clock cycles. This predetermined number of respective clock cycles is chosen to meet an objective of a maximal distance between read and write addresses. At boot-up time, after waiting a number of clock cycles, a verification operation is performed on the boundaries (write vs. read addresses). The verification operation requires that the recovery operation described above be initiated if the read and write addresses are equal or adjacent. The verification operation then continues for a number of clock cycles after which the elastic store moves to steady state operation. In steady state operation, the recovery operation is initiated only if the read and write addresses are equal. As well as at boot-up time, the verification operation is also performed after each recovery operation.

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First Claim