Microprocessor debugging mechanism employing scan interface

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United States of America Patent

PATENT NO 6385742
SERIAL NO

09262816

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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In order to smooth the entry into a debugging operation using a scan chain of registers in a microprocessor, a method for carrying out debugging procedures. The method comprises providing a processor with a chain of scan registers, a scan interface for interfacing with an external scan controller, a breakpoint interrupt mechanism for executing an interrupt instruction, and a processor clock control mechanism. The method includes detecting or generating a breakpoint in the operation of the processor. The breakpoint interrupt mechanism executes an interrupt instruction as a result of which the processor completes its current instruction, and signals the same to the scan interface. The scan interface asserts a Start Scan signal to the clock signal control mechanism, which whereupon stops the processor clock or clocks. The external scan controller is alerted to start a scan sequence.

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Patent Owner(s)

  • AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kershaw, Simon Martin San Jose, CA 2 131
Kirsch, Graham Tadley, GB 68 836

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