Semiconductor memory module and module system
Number of patents in Portfolio can not be more than 2000
United States of America Patent
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-
May 14, 2002
Grant Date -
N/A
app pub date -
Nov 20, 2000
filing date -
May 8, 2000
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Provided is a semiconductor memory module capable of decreasing a parasitic capacitance and a parasitic inductance which are incidental to a signal transmission path, thereby reducing a distortion of a signal waveform. In a memory module, four DRAMs are provided on a muttilayer printed circuit board in one line corresponding to a direction of arrangement of external terminals thereof and board terminal groups of the module are provided to make a pair along two long sides of the multilayer printed circuit board. The DRAM has external terminals extended from one of the long sides and external terminals extended from the other long side. Board terminals and board terminals in the board terminal group of the module are connected to the DRAM, and board terminals and board terminals in the board terminal group TGB of the module are connected to the DRAM.
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