Method of a comprehensive sequential analysis of the yield losses of semiconductor wafers
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United States of America Patent
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May 21, 2002
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N/A
app pub date -
Jun 15, 1999
filing date -
Oct 21, 1998
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Abstract
A method for improving yield management of semiconductors being inspected for defects. The method uses critical area analysis, spacial analysis, yield loss node analysis, yield loss manufacturing location, and yield loss cause analysis for both in-line monitors and at each node due to situational circumstances.
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