Fabrication technique for controlled incorporation of nitrogen in gate dielectric

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United States of America Patent

PATENT NO 6399445
SERIAL NO

09212508

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Abstract

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A method of fabricating a semiconductor MOS device and the device wherein there is initially provided a semiconductor substrate having a gate insulator layer thereon and intimate therewith. A region of one of a nitride or oxynitride is formed at the surface region of the layer remote from the substrate having sufficient nitride to act as a barrier against the migration of dopant therethrough to the substrate. A doped polysilicon gate or a metal gate is then formed over the region of a nitride or oxynitride. The amount of nitride in the insulator layer intimate and closely adjacent to the substrate is insufficient to materially alter the characteristics of the device being fabricated. The substrate is preferably silicon, the oxide and nitride are preferably those of silicon and the dopant preferably includes boron. The step of forming a region of one of a nitride or oxynitride includes the step of injecting neutral atomic nitrogen into the surface of the gate insulator layer surface remote from the substrate. The region of one of a nitride or oxynitride is from about 1 to about 2 monolayers.

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Patent Owner(s)

Patent OwnerAddress
TEXAS INSTRUMENTS INCORPORATED12500 TI BLVD MS 3999 DALLAS TX 75243

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hattangady, Sunil V McKinney, TX 16 435
Kraft, Robert Plano, TX 51 618
Krishnan, Srikanth Plano, TX 27 253

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