Graphics processor architecture employing variable refresh rates
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United States of America Patent
Stats
-
Jun 4, 2002
Grant Date -
Nov 22, 2001
app pub date -
Apr 23, 1998
filing date -
Apr 23, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
The display system includes a display controller which renders text and graphics and writes it to the RAM. The display controller then reads the rendered information from the RAM and activates a display based upon that information. Generally the display controller reads information from the display controller and activates the display at a constant refresh rate; however, when a large number of text and/or graphics to be rendered have accumulated, the display controller temporarily reduces the refresh rate in order to render and write the text and/or graphics to the RAM.
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