Variable length decoding system having a mask circuit for improved cache hit accuracy
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jun 11, 2002
Grant Date -
N/A
app pub date -
May 30, 2000
filing date -
May 27, 1999
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a decoding system having a cache memory, for decoding a variable length code such as a MH code, the decoding is carried out by accessing the cache memory by using a variable length code as an address. Whether the cache memory is hit or mishit is judged by discriminating whether or not the code bits of the 7 bits succeeding to the firstly appeared '1' in the actual code is coincident with the tag stored in the cache memory. This comparison is carried out by masking bits other than an effective bit length of the actual code, by utilizing the three-bit information indicating the number of remaining bits in the actual code, succeeding to the firstly appeared '1', outputted from the cache memory. Thus, the decoding system is capable of elevating the hit rate of the cache memory.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully