Flip chip assembly with via interconnection
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United States of America Patent
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-
Jun 18, 2002
Issued Date -
N/A
app pub date -
May 10, 2001
filing date -
May 2, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A flip chip assembly, and methods of forming the same, including a single layer or multilayer substrate in which via holes serve as connections between a semiconductor chip and the substrate. The assembling steps comprise attaching a chip to a substrate having a plurality of via holes for connecting respective traces on the substrate with respective input/output terminal pads of the chip. The via holes are aligned with and placed on top of the pads so that the pads are exposed through the opposite side of the substrate. Electrically conductive material is subsequently deposited in the via holes as well as on the surface of the pads to provide electrical connections between the pads and the traces. Electrically conductive materials include electroless plated metals, electrochemical plated metals, solders, epoxies and conductive polymers.
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