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Abstract

The present invention relates to a transistor in a semiconductor device and method of manufacturing the same, more particularly to a new dual gate P.sup.+ salicide forming technology having an elevated channel and a source/drain using the selective SiGe epi-silicon growth technology. It relates to manufacturing of a high performance surface channel PMOS salicide which has the following effects: it can increase the current driving force by using an elevate channel structure of Si/SiGe/Si at the channel portion for increasing the current driving force, thus making the stress induced by the buried SiGe layer increase the carrier mobility, it has an increased current driving force effect due to reduction of the work function of the poly-SiGe being mid-band gap materials, it can improve the short channel effect by an improved gate poly depletion suppression due to an increased activation of boron at SiGe, it can suppress the leakage current at the junction by forming a buried/elevated SiGe layer at the junction portion to form a band gap engineered junction, and it can obtain a still shallower junction due to suppression of diffusion of boron doped at the junction layer.

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First Claim