Method of performing reliable updates in a symmetrically blocked nonvolatile memory having a bifurcated storage architecture
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United States of America Patent
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Jun 25, 2002
Grant Date -
Nov 15, 2001
app pub date -
Jan 20, 2000
filing date -
Apr 6, 1997
priority date (Note) -
In Force
status (Latency Note)
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Abstract
Methods of allocating, writing, reading, de-allocating, re-allocating, and reclaiming space within a nonvolatile memory having a bifurcated storage architecture are described. In one embodiment, a method of reliably re-allocating a first object stored within a block erasable nonvolatile memory includes the step of allocating space for a second object. A write of the second object is initiated and the writing of the second object is tracked. In another embodiment, a method of re-allocating a first object stored within a block erasable nonvolatile memory includes the step of invalidating the first object, if the first object has an unreliable type of recovery level. Space is allocated for the second object. A write of the second object is initiated and the writing of the second object is tracked. In another embodiment, a method of reliably re-allocating a first object stored within the block erasable nonvolatile memory includes the step of allocating space for the second object. A write of the second object is initiated and the writing of the second object is tracked. The first object is invalidated after completion of writing the second object, if the first object has a reliable type of recovery. In one embodiment, the first object resides within a first portion of nonvolatile memory and the instructions for performing the described methods reside in a second portion of nonvolatile memory. The first and second portions can reside within a same nonvolatile memory such as a symmetrically blocked flash electrically erasable programmable read only memory.
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Patent Owner(s)
| Patent Owner | Address | |
|---|---|---|
| INTEL CORPORATION | 2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054 |
International Classification(s)
Inventor(s)
| Inventor Name | Address | # of filed Patents | Total Citations |
|---|---|---|---|
| Edwards, David A | Orangevale, CA | 150 | 5736 |
| Hasbun, Robert N | Shingle Springs, CA | 55 | 3531 |
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| Fee | Large entity fee | small entity fee | micro entity fee | due date |
|---|
| Fee | Large entity fee | small entity fee | micro entity fee |
|---|---|---|---|
| Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
| Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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