Integrated verification and manufacturability tool

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United States of America Patent

PATENT NO 6415421
APP PUB NO 20010052107A1
SERIAL NO

09747190

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Abstract

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An integrated verification and manufacturability tool provides more efficient verification of integrated device designs than verification using several different verification tools. The integrated verification and manufacturability includes a hierarchical database to store shared design data accessed by multiple verification tool components (e.g., layout versus schematic, design rule check, optical process correction, phase shift mask assignment and machine language conversion). The hierarchical database includes representations of one or more additional, or intermediate layer structures that are created and used by the verification tool components for operations performed on the design being verified. Use of a single hierarchical database having shared data for access and use by multiple verification components streamlines the verification process, which provides an improved verification tool.

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Patent Owner(s)

Patent OwnerAddress
SIEMENS INDUSTRY SOFTWARE INC5800 GRANITE PARKWAY SUITE 600 PLANO TX 75024-6612

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anderson, Leigh C Tigard, OR 4 460
Cobb, Nicolas B San Jose, CA 22 981
Grodd, Laurence W Portland, OR 32 926
Sahouria, Emile(San Jose, CA) Wilton, CT 1 307
You, Siqiong San Jose, CA 3 404

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