High voltage MOS devices with high gated-diode breakdown voltage and punch-through voltage

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United States of America Patent

PATENT NO 6417550
APP PUB NO 20020020891A1
SERIAL NO

08920377

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Abstract

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A transistor device suitable for high voltage and low voltage applications, while maintaining minimum channel lengths. In one embodiment, pocket implants (310) are formed in a minimum channel device causing a reverse channel effect. The reverse channel effect is optimized for the minimum channel length of the device. Field implants (120), enhancement implants (130), and wells (140) are all formed using a single mask.

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Patent Owner(s)

Patent OwnerAddress
ALTERA CORPORATION101 INNOVATION DRIVE SAN JOSE CA 95134

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liu, David K Y Fremont, CA 48 809
Madurawe, Raminda U Sunnyvale, CA 53 1564

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