Efficient memory management for channel drivers in next generation I/O system

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United States of America Patent

PATENT NO 6421769
SERIAL NO

09475610

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Abstract

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A memory management system includes a plurality of memory elements to enable translation of virtual memory addresses to physical memory locations. The memory elements have at least first and second memory element configurations. The first and second memory element configurations separately process allocated memory elements and unused memory elements, respectively.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BLVD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bakshi, Bikram Singh Portland, OR 15 2229
Teitenberg, Tim Portland, OR 1 62

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