Data processor having BIOS packing compression/decompression architecture
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United States of America Patent
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Jul 16, 2002
Issued Date -
N/A
app pub date -
Jul 15, 1997
filing date -
Oct 14, 1994
priority date (Note) -
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status (Latency Note)
Importance
Abstract
To increase the effective capacity of BIOS, an initial portion of the power on system reset (POST) code that is required to enable the system memory is stored in ROM in uncompressed form, and substantially the remaining portion of the BIOS code is stored in compressed form. Upon system initialization during a cold boot, the uncompressed portion of POST is executed from the ROM to enable the system memory, and then an image of the BIOS code is written to shadow memory. As BIOS code is needed during the remainder of the boot, the code is selectively decompressed from the shadow memory to another region of the system memory to which control is transferred. Variations based upon different boot scenarios are described.
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