Importance

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Abstract

An FPGA configuration provides a virtual instruction. In a generic computation, the output pattern of a first instruction is compared to the input pattern of a second instruction. If the input and output patterns of the first and second instructions do not match, then a pattern manipulation instruction is inserted between the first and second instructions. At this point, the input and output patterns of the first and second instructions should match and the computation task can be completed. The method of providing virtual instructions is applicable to any FPGA. In a standard FPGA, the data stored in the storage elements of the FPGA, such as flip-flops, is retained for the next configuration of the FPGA. In this manner, successive configurations can communicate data using the patterns of the storage elements, thereby allowing standard FPGAs to implement virtual instructions. Alternatively, a standard FPGA could write out data to an external memory using a predetermined pattern of addresses. In a subsequent configuration of the FPGA, the device could read data back from this pattern of addresses in the external memory. This embodiment allows various patterns of addresses, corresponding to data, to be used in any appropriate subsequent configuration of the FPGA. In this manner, the plurality of memory planes, previously provided on the dynamically reconfigurable FPGA, can be implemented off-chip.

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First Claim