PZT layer as a temporary encapsulation and hard mask for a ferroelectric capacitor
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United States of America Patent
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Jul 23, 2002
Grant Date -
N/A
app pub date -
Jun 26, 2001
filing date -
Jun 26, 2001
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method of patterning and etching an integrated circuit ferroelectric capacitor uses a layer of PZT which has the same composition as the capacitor PZT as a temporary encapsulation during PZT grain growth annealing. The temporary encapsulation PZT also serves as a hard mask to pattern the top electrode and the capacitor PZT layers for a capacitor-on-oxide structure, i.e., two-layer-one-step patterning. The process of the present invention can also be modified as a three-layer-one-step patterning process and can be applied to a capacitor-on-plug structure.
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